- IT
- Research
Secured-by-design systems-on-chip: a MBSE Approach
Raphaële Milan, Loïc Lagadec, Théotime Bollengier, Lilian Bossuet, Ciprian Teodorov
Rapid System Prototyping, Sep 2023, Hambourg, Germany
Acceleration of contractor algebra on RISCV in the context of mobile robotic
Pierre Filiol, Luc Jaulin, Jean-Christophe Le Lann, Théotime Bollengier
Summer Workshop on Interval Methods, Jun 2023, Angers, France
A new interval arithmetic to generate the complementary of contractors
Pierre Filiol, Théotime Bollengier, Luc Jaulin, Jean-Christophe Le Lann
Summer Workshop on Interval Methods, Jul 2022, Hannover, Germany
Procédé de configuration d'un circuit logique programmable, circuit logique programmable et dispositif pour implémenter le procédé
Loïc Lagadec, Ciprian Teodorov, Jean-Christophe Le Lann, Théotime Bollengier
France, N° de brevet: FR3115134. 2022
Prototyping FPGA through overlays
Theotime Bollengier, Loïc Lagadec, Ciprian Teodorov
2021 IEEE International Workshop on Rapid System Prototyping (RSP), Oct 2021, Paris, France. pp.15-21, ⟨10.1109/RSP53691.2021.9806222⟩