Madeo
Madeo BET
The
Madeo framework [bib]
[tutorial]
[flyer]
is an open and extensible modeling environment that allows to
represent reconfigurable architectures. It acts as a one-stop
shopping point providing basic functionalities to the programmer
(place&route, floorplaning, simulation, etc.).
Based on Madeo, several commercial and prospective architectures have been designed (Virtex, reconfigurable datapath, etc.), and some algorithms have been tailored to adress nano computing architectures (WISP, etc.).
The Madeo project ended in 2006 while being integrated as facilities in a new framework named Biniou.
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Architecture modeling relies on a ADL compilation. The basic tool set includes visualizer, editing, floorplaning, P&R, resources allocation outputing. For selected architectures, the bitstream can be issued and the execution can be controled. |
The Madeo project has been on since 95/96. One of the concluding remarks of the previous project was that to be dependent
of the CAD tools the FPGAs vendors provide is highly time consuming as almost no API is preserved from one generation to another. Another conclusion was that programming a complex hardware mixing several computational models requires a high level unified front end making use of code generation on demand.
The back-end layer called MADEO-BET produces a textual ”bitstream” from a hierarchical RTL description (BLIF, EDIF, or an internal format supporting regular circuits) from one hand, and a modelization of an architecture from another hand. The designer benefits from a set of hardware elements (functions, switch, multiplexers, etc. . . ) that can be combined and/or specialized to describe a given architecture. This stage is archived through a compilation process, after the designer has described within a private language its architecture.
Textual editor
(1) Low power architecture
(2) Datapath based architecture
(3) Hierarchical architecture
A
set of generic tools (P&R, floorplanner, regular editor, etc.
. . ) manipulates this architecture, with as main benefits, (a)
the capability to effortlessly describe any architecture (eg.
1-3 a low power architecture [ref],
an hetegogeneous architectures, a hierarchical architectures) ,
(b) the reduction of software development effort as tools are
shared among architectures, and (c) domain space exploration
capabilities.
It
is also possible to automate this architectural variation,
and to collect feedback to drive the designer’s choices
regarding a class of target application to implement.
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