Journals

  1. [1] L. Allal, G. Belalem, P. Dhaussy, and C. Teodorov, "Distributed algorithm to fight the state explosion problem", INDERSCIENCE International Journal of Internet Technology and Secured Transactions., vol. 8, no. 3, pp. 398–411, 2018.
  2. [2] C. Teodorov, L. Le Roux, Z. Drey, and P. Dhaussy, "Past-Free[ze] reachability analysis: reaching further with DAG-directed exhaustive state-space analysis", Software Testing, Verification and Reliability, pp. n/a–n/a, Aug. 2016.
  3. [3] L. Allal, G. Belalem, P. Dhaussy, and C. Teodorov, "A Parallel Algorithm for the State Space Exploration", Scalable Computing: Practice and Experience, vol. 17, pp. 129–142, Jun. 2016.
  4. [4] L. Allal, G. Belalem, P. Dhaussy, and C. Teodorov, "Sequential and Parallel Algorithms for the State Space Exploration", Cybernetics And Information Technologies, vol. 16, p. 18, Apr. 2016.
  5. [5] C. Teodorov, P. Dhaussy, and L. Le Roux, "Environment-driven reachability for timed systems", International Journal on Software Tools for Technology Transfer, pp. 1–17, 2015.
  6. [6] C. Teodorov and L. Lagadec, "Model-driven physical-design automation for FPGAs: fast prototyping and legacy reuse", Software: Practice and Experience, vol. 44, no. 4, pp. 455–482, 2014.
  7. [7] L. Lagadec, C. Teodorov, J.-C. L. Lann, D. Picard, and E. Fabiani, "Model-driven toolset for embedded reconfigurable cores: Flexible prototyping and software-like debugging", Science of Computer Programming, vol. 96, Part 1, pp. 156–174, 2014.
  8. [8] C. Dezan, C. Teodorov, L. Lagadec, M. Leuchtenburg, T. Wang, P. Narayanan, and A. Moritz, "Towards a framework for designing applications onto hybrid nano/CMOS fabrics", Microelectronics Journal, vol. 40, no. 4-5, pp. 656–664, 2009.

Conferences

  1. [1] V. Leilde, V. Ribaud, C. Teodorov, and P. Dhaussy, "A Problem-Oriented Approach to Critical System Design and Diagnosis Support", in MEDI 2018, International Conference on Model and Data Engineering. Workshop DETECT, Marrakech, Morocco, 2018, pp. 30–39.
  2. [2] V. Besnard, M. Brun, F. Jouault, C. Teodorov, and P. Dhaussy, "Unified LTL Verification and Embedded Execution of UML Models", in Proceedings of the 21th ACM/IEEE International Conference on Model Driven Engineering Languages and Systems, New York, NY, USA, 2018, pp. 112–122.
  3. [3] V. Leilde, V. Ribaud, C. Teodorov, and P. Dhaussy, "Domain-oriented Verification Management", in 8th International Conference on Model and Data Engineering (MEDI 2018), Marrakesh, Morocco, 2018.
  4. [4] V. Besnard, M. Brun, F. Jouault, C. Teodorov, and P. Dhaussy, "Embedded UML Model Execution to Bridge the Gap Between Design and Runtime", in MDE@DeRun 2018 : First International Workshop on Model-Driven Engineering for Design-Runtime Interaction in Complex Systems, Toulouse, France, 2018.
  5. [5] A. Bounceur, M. Bezoui, M. Lounis, R. Euler, and C. Teodorov, "A new dominating tree routing algorithm for efficient leader election in IoT networks", in 15th IEEE Annual Consumer Communications & Networking Conference (CCNC), Las Vegas, France, 2018.
  6. [6] V. Besnard, M. Brun, P. Dhaussy, F. Jouault, D. Olivier, and C. Teodorov, "Towards one Model Interpreter for Both Design and Deployment", in ACM/IEEE 20th International Conference on Model Driven Engineering Languages and Systems., Austin, United States, 2017.
  7. [7] V. Leildé, V. Ribaud, C. Teodorov, and P. Dhaussy, "A Diagnosis Framework for Critical Systems Verification", in Software Engineering and Formal Methods: 15th International Conference, SEFM 2017, Trento, Italy, September 4–8, 2017, Proceedings, 2017, pp. 394–400.
  8. [8] E. Fabiani, L. Lagadec, M. B. Hammouda, and C. Teodorov, "Asserting causal properties in High Level Synthesis", in 2017 IEEE 2nd International Verification and Security Workshop (IVSW), 2017, pp. 111–116.
  9. [9] Z. Drey and C. Teodorov, "Object-Oriented Design Pattern for DSL Program Monitoring", in 9th ACM SIGPLAN International Conference on Software Language Engineering (SLE), Amsterdam, Netherlands, 2016.
  10. [10] S. Heim, X. Dumas, E. Bonnafous, P. Dhaussy, C. Teodorov, and L. Leroux, "Model Checking of SCADE Designed Systems", in 8th European Congress on Embedded Real Time Software and Systems (ERTS 2016), Toulouse, France, 2016.
  11. [11] S. R. Boudaoud, K. Es-Salhi, V. Ribaud, and C. Teodorov, "Relational and graph queries over a transition system", in EUROCON 2015 - International Conference on Computer as a Tool (EUROCON), IEEE, 2015, pp. 1–6.
  12. [12] E.-S. Khaoula, S. R. Boudaoud, C. Teodorov, V. Ribaud, and Z. Drey, "KriQL : A Language for Query-based Diagnosis of Transition Systems", in 15th International Workshop on Automated Verification of Critical Systems, 2015.
  13. [13] J.-P. Schneider, J. Champeau, C. Teodorov, E. Senn, and L. Lagadec, "A role language to interpret multi-formalism System of systems models", in Systems Conference (SysCon), 2015 9th Annual IEEE International, 2015, pp. 200–205.
  14. [14] J. Deantoni, I. P. Diallo, C. Teodorov, J. Champeau, and B. Combemale, "Towards a meta-language for the concurrency concern in DSLs", in Design, Automation Test in Europe Conference Exhibition (DATE), 2015, 2015, pp. 313–316.
  15. [15] S. Tleye, C. Teodorov, E. Fabiani, and L. Lagadec, "Phadeo: un environnement pour FPGA virtuel", in Conference en Parallelisme, Architecture et Systeme (COMPAS’15), 2015.
  16. [16] C. Teodorov and L. Lagadec, "Virtual Prototyping of R2D Nasic Based FPGA", in Proceedings of the 2014 IEEE/ACM International Symposium on Nanoscale Architectures, New York, NY, USA, 2014, pp. 179–180.
  17. [17] V. Ribaud, C. Teodorov, Z. Drey, L. Le Roux, and P. Dhaussy, "Techniques and Challenges for Trace Processing from a Model-Checking Perspective", in CISSE 2014, 2014.
  18. [18] J.-P. Schneider, C. Teodorov, E. Senn, and J. Champeau, "Towards a Dynamic Infrastructure for Playing with Systems of Systems", in Proceedings of the 2014 European Conference on Software Architecture Workshops, New York, NY, USA, 2014, pp. 31:1–31:4.
  19. [19] C. Teodorov, P. Narayanan, L. Lagadec, and C. Dezan, "Regular 2D NASIC-based architecture and design space exploration", in Nanoscale Architectures (NANOARCH), 2011 IEEE/ACM International Symposium on, 2011, pp. 70–77.
  20. [20] C. Teodorov, "Comparing crossbar-based nano/CMOS architectures", in Design and Technology of Integrated Systems in Nanoscale Era (DTIS), 2010 5th International Conference on, 2010, pp. 1–6.
  21. [21] D. Picard, B. Pottier, and C. Teodorov, "Process System Modeling for RSoC", in 4th International Workshop on Reconfigurable Communication Centric System-on-Chips, 2008.
  22. [22] C. Amariei, C. Teodorov, E. Fabiani, and B. Pottier, "Modeling Sensor Networks as Concurrent Systems", in Fourth International Conference on Networked Sensing Systems (INSS’07), Braunschweig, Germany, 2007.
  23. [23] C. Amariei and C. Teodorov, "Investigating Sensor Networks with Concurrent Sequencial Processes and Smalltalk", in Fourth International Conference on Networked Sensing Systems (INSS’07), Braunschweig, Germany, 2007.

Workshops

  1. [1] C. Teodorov, "Embedding Multiform Time Constraints in Smalltalk", in International Workshop on Smalltalk Technologies (IWST’14), 2014.
  2. [2] C. Teodorov and L. Lagadec, "MDE-based FPGA Physical Design. Fast Model-Driven Prototyping with Smalltalk", in International Workshop on Smalltalk Technologies, 2011.
  3. [3] C. Teodorov, D. Picard, and L. Lagadec, "FPGA Physical-Design Automation using Model-Driven Engineering", in 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC’11), 2011.
  4. [4] C. Teodorov and L. Lagadec, "FPGA SDK for Nanoscale Architectures", in 6th International Workshop on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC’11), 2011.
  5. [5] D. Picard, B. Pottier, and C. Teodorov, "Process Networks on Reconfigurable SoC", in Aether-Morpheus Workshop - Autumn School 2007 From reconfigurable to self-adaptative computing (AMWAS’07), Paris, France, 2007.
  6. [6] C. Teodorov, J. Knablein, and B. Pottier, "Quick Integration of High Level Tools in MORPHEUS: The case of SpecEdit", in Aether-Morpheus Workshop - Autumn School 2007 From reconfigurable to self-adaptative computing (AMWAS’07), Paris, France, 2007.

Project Livrables

  1. [1] C. Teodorov, L. L. Roux, and P. Dhaussy, "Modèle d’exécution de la plateforme de Simulation", DDASCA DEPARTS Livrable WP 4.1_1. 2015.
  2. [2] C. Teodorov, L. L. Roux, and P. Dhaussy, "Règles de tranformation ABCD vers Fiacre", DDASCA DEPARTS Livrable WP 4.1_2. 2015.
  3. [3] C. Dezan, T. Goubier, C. Teodorov, S. Yazdani, L. Lagadec, E. Fabiani, L. Le Dréau, Gueguen Loı̈c, C. Jégo, and B. Pottier, "Rapport et bilan pour le projet VALMADEO pour l’étape 3". Université de Bretagne Occidentale, Nov-2008.

Technical Reports

  1. [1] J. Deantoni, P. I. Diallo, J. Champeau, B. Combemale, and C. Teodorov, "Operational Semantics of the Model of Concurrency and Communication Language", INRIA, Research Report RR-8584, Sep. 2014.
  2. [2] C. Teodorov, "Design and Evaluation of Fault Tolerant Crossbar-based nano/CMOS architectures", Université de Bretagne Occidentale, 2009.
  3. [3] C. Teodorov, D. Picard, and B. Pottier, "From Sensor Networks to Concurrent Systems", Université de Bretagne Occidentale, Jun. 2008.
  4. [4] C. Teodorov and B. Pottier, "SpecEdit Modeling and CDFG Translation", Université de Bretagne Occidentale, Aug. 2007.

Theses

  1. [1] C. Teodorov, "Model-Driven Physical-Design for Future Nanoscale Architectures", PhD thesis, Université de Bretagne Occidentale, 2011.
  2. [2] C. Teodorov, "NaBoo: A Generic Evolutive CAD Framework for Automatic Circuit Layout on Emerging Nanoscale Architectures", Master's thesis, Université de Bretagne Occidentale, 20 avenue Le Gorgeu, 29200, Brest, France, 2008.
  3. [3] C. Teodorov, "NanoCAD: Design Automation Methods for Emerging Nanoscale Technologies. A Survey of Nanoscale Computing Architectures and Associated CAD Tools", Master's thesis, Université de Bretagne Occidentale, 2008.
  4. [4] C. Teodorov, "Modeling Sensor Networks as Concurrent Systems", Master's thesis, Université de Bretagne Occidentale, 2007.

Other Publications

  1. [1] C. Teodorov and P. Dhaussy, "Context-aware Verification", GDR GPL (Invited speaker). 2016.
  2. [2] J.-P. Schneider, J. Champeau, E. Senn, L. Lagadec, and C. Teodorov, "Role Framework for System of Systems", Forum AFIS. Dec-2014.
  3. [3] P. Dhaussy, L. Le Roux, and C. Teodorov, "Vérification formelle de propriétés : Application de l’outil OBP au cas d’étude CCS", Génie logiciel, vol. 109. C & S, Jun-2014.
  4. [4] F. Jouault, C. Teodorov, J. Delatour, L. Le Roux, and P. Dhaussy, "Transformation de modèles UML vers Fiacre, via les langages intermédiaires tUML et ABCD", Génie logiciel, vol. 109. C & S, Jun-2014.
  5. [5] C. Teodorov, "Model-Driven physical design for future architectures", Emerging Technologies meeting of GDR SoC-SiP (Invited speaker). Apr-2012.
  6. [6] C. Teodorov, L. Lagadec, and C. Dezan, "Max-Rate Pipeline with Regular NASIC-based Architecture Template", GDR SoC-SiP. 2011.
  7. [7] C. Teodorov, C. Dezan, and L. Lagadec, "Automatic Circuit Layout for Emerging Nanoscale Architectures", GDR SOC-SIP, Paris, France. Jun-2008.
  8. [8] C. Teodorov, H. Dutta, and B. Pottier, "An Abstract Approach for System Description and Synthesis", First Workshop on Constraint Programming for Hardware Design, Rennes, France. Sep-2007.